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Adding SDRAM for Nios II on DE0-Nano

Introduction Here I will be following up on the previous post and adding an SDRAM Controller and the IP Signals Core to the Nios II system on the DE0-Nano education board. The documentation I will be following can be found

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Nios II on DE0-Nano

Introduction For this I am using Quartus II Web Edition 13.0 SP1, which contains Qsys and Nios II EDS. I will initially follow the steps found in [1] up to section 7 where instead I will move to using Nios

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Posted in FPGA